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Rajeshwer Subramanian, An Implementation Model for Systolic Algorithms on a TMS320C40 Multicomputer, Department of Computer Science and Engineering, Wright State University, 1997. Advisor: Brian J. d'Auriol
A model for the implementation of systolic algorithms is presented using
Parallel C on a TMS320C40 multicomputer. The various components of the
model namely, the configuration, topology and data partitioning are
identified and discussed. A discussion of how these identified components
are essential to the implementation model is also included. A brief
investigation of several systolic designs is conducted and based on the
results of the investigation, a particular systolic execution model is
selected as the underlying parallel execution model for the proposed
implementation model. This thesis investigates the application of matrix
multiplication and sorting algorithms in terms of the proposed
implementation model. Both serial and parallel implementations of
systolic algorithms for matrix multiplication and sorting are performed.
The source code of all programs pertaining to the discussions in this
thesis is provided.