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Brian J. d'Auriol and Meera B. Dugar, "A Systolic Array Graph Partitioning System", Proc. of the Eighth IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems (PDCS'96), Chicago, Illinois, USA, 16-19 October, 1996, K. Li, T.S. Abdelrahman, E. Luque (Eds.), pp. 356-358, October 1996.
Abstract
An X-windows based graphical interface system called the Systolic Array Graph Partitioning system is proposed. This system allows for the partitioning of a given systolic array in the context of a specific model for compiling systolic computations for multicomputers. Particular features of this system include the determination of the topology of the multicomputer and an analysis of the mapping of computations to processors.
Full Paper (pdf: 96KB)
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